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Andrey Mikhalchuk’s Blog

Technoblog about life

Feb 26, 2013 Why on earth make invokes cc instead of gcc!?!

I’m working on my next cool project (subscribe to to find out details) and got stuck with an interesting problem. Here is a fragment of my Makefile:

SOURCES := $(wildcard *.c)
%.o: %.c %.h
$(I_CC) $(I_CCFLAGS) -c $< ...

When I run make clean;make the output is following:

gcc -g -I. -I/usr/include -c 1.c
gcc -g -I. -I/usr/include -c 2.c
cc -c -o main.o main.c
gcc -g -I. -I/usr/include -c 3.c
gcc -g -I. -I/usr/include -c 4.c
gcc -g -I. -I/usr/include -c 5.c
gcc -g -I. -I/usr/include -o gr 1.o 2.o 3.o 4.o 5.o main.o -llib1 -llib2

See how for all the files this invokes compiler with correct flags except for main.c? Not a big deal on most linux systems, but I’m compiling on mac and what’s worst I’m actually crosscompiling. This ugly feature ruins the entire compilation process, so I have to run

gcc -g -I. -I/usr/include -c main.c

before running make so everything gets compiled the same way.

This kept me puzzled for an hour or so until I got annoyed by this manual compilation step and found what’s going on …

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